The present invention relates to a multilayered printed wiring board and a method of manufacturing the same and, more particularly, to a multilayered printed wiring board formed by alternating conductive layers and insulating layers and a method of manufacturing the same.
In recent years, along with the function-improving, down-sizing, weight-reducing, and speed-increasing trends of electronic equipment, down-sized, high-speed electronic devices including LSIs have been developed. To cope with down-sized, multipin, high-speed electronic devices to be mounted, a printed wiring board is required to increase its wiring density, mounting density, and operating speed. Especially, in order to increase tile wiring density of the printed wiring board, a multilayered printed wiring board having an increased number of wiring layers is used to cope with this demand.
According to a conventional method of manufacturing a multilayered printed wiring board, the number of layers is increased by interposing a prepreg between inner layers in which circuits are formed in advance, and pressing the entire structure. However, the inner layers may be undesirably shifted by hot press, the positions of the inner layers may be deviated due to the expansion and contraction of the material, and the thickness of the board may be increased by increasing the number of layers, making it difficult to form through holes. Therefore, to increase the wiring density and the number of layers, strict process management and a large number of process steps are required.
In contrast to this conventional method of manufacturing a multilayered printed wiring board, there is another method of manufacturing a multilayered printed wiring board having a higher density and higher precision (e.g., Japanese Patent Laid-Open No. 60-180197). According to this method of manufacturing a multilayered printed wiring board, first, as shown in FIG. 3A, a board 1 having a first ground layer 2 formed on its upper surface is prepared.
Then, as shown in FIG. 3B, a photosensitive resin is coated on the entire surface of the first ground layer 2 of the board 1 and subjected to dry tact to form a photosensitive resin layer 3a. Subsequently, a photomask is applied on this structure, and exposure and development are performed, thereby forming a hole 16a for a prospective via hole in the photosensitive resin layer 3a.
As shown in FIG. 3C, the photosensitive resin layer 3a is hardened to form a first insulating layer 3. The surface of the first insulating layer 3 is chemically roughened for securing tight contact with an upper layer circuit, and circuits 6 and a via hole 16 are selectively formed on and in the first insulating layer 3.
As shown in FIG. 3D, a second insulating layer 8 is formed on the first insulating layer 3, the circuits 6, and the via hole 16 in the same manner as the first insulating layer 3.
As shown in FIG. 3E, the second insulating layer 8 is roughened, and a second ground layer 10 is formed on a portion of the second insulating layer 8 corresponding to the circuits 6. The circuits 6 sandwiched between the first and second ground layers 2 and 10 are formed in this manner. When the number of layers is to be further increased, the steps including insulating layer formation to circuit formation shown in FIGS. 3B to 3E are repeated.
After a required number of inner layers are formed in this manner, as shown in FIG. 3F, a third insulating layer 11 is formed on the second insulating layer 8 and the second ground layer 10. The third insulating layer 11 is roughened, and the circuits of an uppermost layer are selectively formed. The uppermost layer has parts mounting pads 12. The parts mounting pads 12 are electrically connected to the ground layer 10 from their via holes 17 through the circuits on the uppermost layer.
Thereafter, as shown in FIG. 3G, a solder resist layer 13 is formed on the circuits of the uppermost layer excluding the parts mounting pads 12, and on the third insulating layer 11. If necessary, a solder 14 is supplied onto the parts mounting pads 12 by means of, e.g., a hot air leveler.
In the multilayered printed wiring board obtained in accordance with the above steps, since the number of layers is increased by the steps including photosensitive resin coating to circuit formation, the relative positional precision of the upper and lower layers is high compared to the conventional multilayered scheme employing hot press. Since the via holes are formed by lithography, the diameters of the via holes can be decreased, so that a high-density, high-precision multilayered printed wiring board can be manufactured.
However, the conventional multilayered printed wiring board described above has the following problems.
First, the solder 14 is usually supplied onto the parts mounting pads 12 by means of the hot air leveler or the like. With this method, however, the film thickness of the solder 14 on each parts mounting pad 12 is as small as 10 .mu.m or less and varies largely. As the size of the electronic device is decreased, parts leads are formed at a smaller pitch and the size of the parts leads is decreased. In leads having a pitch of 0.4 mm or less, however, the variations in film thickness of the solder 14 described above cannot be neglected. A bridge is formed at a thick portion of the solder 14, and a lead is not soldered at a thin portion of the solder 14. Thus, an electronic device having leads having a pitch of 0.4 mm or less cannot be mounted.
Second, when the circuit density is increased, the gap between circuits becomes narrow accordingly. Then, however, a signal propagating through a circuit adversely affects an adjacent circuit, so that a desired signal cannot sometimes be transmitted. This phenomenon is called crosstalk.
The crosstalk is increased when the gap between adjacent circuits is small, as indicated by a curve X of the conventional multilayered printed wiring board shown in FIG. 4A, and when the traveling distance of the circuits that run parallel to each other is long, as indicated by a curve X of the conventional multilayered printed wiring board shown in FIG. 4B. Therefore, if a circuit pattern has a plurality of circuits, e.g., bus lines, that run parallel to each other for a long distance, crosstalk poses a serious problem. In the conventional multilayered printed wiring board, the circuits form strip lines sandwiched between the upper and lower ground layers. With these circuits, the circuit gap cannot be decreased due to the reason from the electric characteristics described above. As a result, high-density wiring cannot be obtained.
The shorter the rise and fall times of a signal flowing through a circuit, i.e., the higher the signal frequency, the higher crosstalk. Therefore, the conventional multilayered printed wiring board cannot be applied to a circuit in which a high-frequency digital signal flows.